Semiconductor

Development and Consulting Services

Die bonding inspection - Corner chips, edge chips, large die scratches, oxidation
pattern, inkdot reject, no pattern die, partial die rejects.
Leadframe alignment

Die bonding alignment - Wafer row and column pattern search, flat recognition, die
recognition and street recognition, wafer 3 point calculation for serpentine travel.

Wire bonding alignment - Die pad recognition, die reference point recognition, lead
recognition, outer lead recognition for leadframe and PGA lead.

Wire bonding inspection - Pad pre-bond inspection, lead pre-bond inspection, post
bond inspections. Wire path and loop inspections using vector graphic techniques.
Wafer saw inspection - Kerf detection and qualification.

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